Gender and Mathematics Essay - 944 Words

Mathematics is acknowledged as a hard subject. People who are good at it are considered to belong to a sort of elite. Usually to be â€Å"accepted† in this elite you have to fulfill some requirements and most of them are related with a specific gender. â€Å"Math is a God’s gift for boys.† This has been the perception of society for a long time. The majority thinks that the nature of mathematics goes along mostly with masculine attributes, thus, males are more focused on it. Therefore, according to these people boys by default get to be better in math, with girls being excluded from any kind of decent relation with this field of study. Even though this perception of boys being better in mathematics than the opposite gender is the opinion of†¦show more content†¦The supporters of this perspective follow that the plain reason behind this involvement is that men are generally better in this field. Moreover, according to a research conducted by Kyriakides an d Antoniou boys are more predisposed to fulfill harder math related tasks better than girls (1). This proves the idea that boys’ achievements in math are higher than those of girls. Secondly, there are people who belong to the other extreme that affirm that girls outperform boys in the science of numbers. Several researches were conducted to evaluate the performance of both genders based on their grades in high school. The statistical results of a research in Wales show that 50% of boys and 51% of girls achieved grades A*-C in mathematics (Cann 1). The outcome of data displayed that girls’ abilities in this relevant field exceed those of boys. However, girls choose not to attend these mathematics-related majors. Rather they decide to concentrate in the biochemical sciences in order to be a part of the difference in the world by generating change (Weinstock par. 1). Other advocates of this approach go far beyond explaining that there are more reasons why girls choose n ot to devote their selves to mathematics. The participation in this particular field is affected by numerous factors such as anxiety, self-confidence and enjoyment. Females tend to have negative emotions regarding these factors and math in general. The reason behind theseShow MoreRelated Human Gender and Mathematics Essay1381 Words   |  6 PagesHuman Gender and Mathematics Is there a difference in the mathematical ability between men and women? Historians have no precise method of quantifying or comparing their individual accomplishments (Olsen). Not only in mathematics, but also in many other career areas in the past, women were looked upon as inferior to their male counterparts. Women were not encouraged to pursue a career in mathematics. Historically, women were seen working around the home, cleaning the house, taking care of theRead MoreGender Gap Within The Fields Of Science, Technology, Engineering, And Mathematics933 Words   |  4 Pages6137 I analyzed topics that affected today’s teens. I found that a gender gap exists in the fields of science and technology. Females are underrepresented in the area of Science, Technology, Engineering, and Mathematical (STEM) related careers. According to research, girls should be encouraged to pursue their interests, find mentors, and collaborate with others in the areas of science, technology, engi neering, and mathematics. In light of these findings, I presented a booktalk to a group of girlsRead MoreThe Impact Of Gender, College Year, And Prior Experience On Students Anxiety1329 Words   |  6 PagesProject Title: The Impact of Gender, College year, and Prior Experience on Students’ Anxiety Narrative: UNC IRB Application A. Purpose Statistics anxiety is prevalent among students whose academic background has little statistical training (Pan Tang, 2004). Researchers (Onwuegbuzie, Da Ros, Ryan, 1994; Zeidner, 1991) concluded that many college students experience statistics test anxiety. Most of these researchers focused on students statistics test anxiety due to little statistical backgroundRead MoreThe Phenomenon of Math Anxiety: A Research661 Words   |  3 Pagesthose who know the language in which it was written. And that language is mathematics, (cited by the University of Minnesota School of Mathematics, n.d.). A universitys mathematics department is sure to claim things like, Mathematics is the most versatile of all the sciences. In spite of this, the negative reactions to mathematics instruction can be extreme. Research shows that, for those with high levels of mathematics-anxiety (HMAs), math is associated with tension, apprehension, and fear,Read MoreInvestigation Of Turkish Students Mathematics Performance Based On Pisa 2012 Essay1631 Words   |  7 PagesInvestigation of Turkish Students’ Mathematics Performance based on PISA 2012 Objective The purpose of this study was to investigate the relationship between selected student- and school-level variables and mathematics performance of Turkish students using PISA 2012 dataset. Two research questions were investigated: (1) How much do schools vary in their mean mathematics achievement in Turkey? (2) Which student- and school-level variables are associated with students’ mathematics performance in Turkey basedRead MoreToys : Toys Affect Their Gender1073 Words   |  5 Pagesshapes, and forms. Many people might not know, but toys, play a major role in children’s lives as they grow up. Through out years’ parents have been focusing on how girl toys impact them as they grow up, but haven’t noticed that boy toys affect their gender construction just the same. Legos for example created in 1932 by Ole Kirk Christiansen, most popular for boys, have always been portrayed as neutrally gendered toys. Legos has been creating gendered themed sets for boys a nd girls, but their main consumersRead MoreAn Exploration Into The Lack Of Female Interest1654 Words   |  7 PagesFemale Interest in Mathematics and Possible Solutions to the Problem Introduction As soon as the suggested topics were revealed, it was obvious to me which topic caught my attention, ‘Equity in mathematics learning and teaching – addressing social issues related to gender, class and ethnicity’. Obviously this topic was too broad a subject for me to research into with any depth so I began researching into the area which would most interest me. The result was the issue of gender within learning. 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Thus, there were four (equal) groups of mathematics students attending school at grade 1(group 1 (27 students), group 2 (26 students), group 3 (28 students), and group 4 (24students), and these classes were assigned to two different teaching approaches in Mathematics. Five years later, studentsRead MoreTechnology And The Impact Of Information Technology In Education1268 Words   |  6 Pagesteaching-learning process. Introduction related Mathematics achievement Many people do not know that mathematics is more than what is taught at school, and different from what most people think it is. The students have a wrong image of mathematics- that mathematics is many formulae to learn, without knowing why; mathematics is a never changing, not lively subject; something for nerds and loners, and thus, maybe, also something for boys and men and not for girls and women. Gender is a set of characteristics distinguishing

Brave New World By Huxley Essay Example For Students

Brave New World By Huxley Essay In Aldous Huxleys Brave New World the setting is set many years into the future. This future describes a world where science and technology have been allowed to progress unchecked. There are no moral or spiritual obligations and the good of society is placed above individuality and freedom. Lenina Crown is a perfect example of this society and all that it represents. Lenina Crown is a model example of how unchecked technology can destroy humanity. If you allow every desire to be satisfied with no work or effort it teaches people that they are entitled to privileges and should not have to work for them. With only physical wants considered the moral, emotional, and spiritual aspects of society are eliminated, leaving only pleasure as a deciding factor. The lack of care for resources is shown with the hypnopaedic phrase of Ending is better than mending. This along with, Every one belongs to every one else capture the spirit of the New World perfectly. There is nothing needed except pleasure and instant gratification to factor into a decision. If you allow science and technology to be your god and savior it is proof of a decaying society. If progress becomes more important than spirituality you begin to lose your soul, the very part of you that makes you human. Leninas complete lack of knowledge of God, religion, and faith show that even though there is little suffering in the New World, there is no real joy or happiness. True happiness can only come from faith and without it there can only be a mediocre existence. Lenina can not understand Johns religion, the Indians beliefs or anything that resembles faith. This is because the New World discourages anything but the present and physical pleasure. This keeps the citizens happy only because they have never experience true emotion. For all her beauty and brains, Lenina lacks one of the corner stones of a normal society, morals. She is not a bad person but does not have any set of guidelines to live by. The Solidaity Services with Orgy-Porgy and the belief that, Promiscuity is a citizens duty are meant to promote group pleasure and social stability, sacrificing the individuals morals and personal beliefs. Without these beliefs people are not individuals but programmed robots who do what they are told is best for them. To leave science and technology to progress without regulation is to open the door to the decline of humanity. Everything is done according to what is best for the entire society as dictated by the World Controllers. With no emotions, pain, joy, morals, or spirituality to say what is right or wrong technology continues on into areas where self-control and restraint are needed but none is used. With nothing to guide science, only chaos and death can come in the end.

The Sailmaker review Essay Example

The Sailmaker review Essay These were the optimistic and boastful words of a young boy who was proud of his father and his trade but throughout the play Alecs faith in his father was dwindling down to nothing and by the end of the play it was all but diminished when he summed up his feelings and his fathers life perfectly You were always gonnae fix it up for me. Ye just never did. The play centres around the relationship between a widower named Davie and his son Alec. In the opening scene of the play Davie returns home from the hospital with the dreadful news that his wife was dead. The news broke Alec but he would recover and get on with his life but this was the beginning of the end for Davie, for just weeks before he had been laid off from his job as a sailmaker because there was just no work left in the trade. Davies only way of supporting himself and Alec financially was his job as a tick man going round doors and collecting money, but on the side Davie was a very keen betting man and had several lines on each week, often spending the best part of his weeks wages on them. We will write a custom essay sample on The Sailmaker review specifically for you for only $16.38 $13.9/page Order now We will write a custom essay sample on The Sailmaker review specifically for you FOR ONLY $16.38 $13.9/page Hire Writer We will write a custom essay sample on The Sailmaker review specifically for you FOR ONLY $16.38 $13.9/page Hire Writer Davies job alone couldnt suffice his son and his gambling needs, so he soon became buried in debt with both the illegal bookmaker and his brother Billy. With his father being away at work most of the day and then going for his daily wee half at the pub afterwards, Alec was having to become more and more independent just to get through the times. He began to develop a close friendship with his cousin Ian and along with using each other as sparring partners they done pretty much everything together. They seemed joined-at-the-hip as children, always out on the street playing football and reading comics together, but as they grew up, they also grew further apart and began to share less of a common ground with each other. For example Alec decided that he wanted to stay on at school, get good grades, go to university and get a shirt-and-tie job, whereas Ian wanted to drop out of school as soon as he could and follow his father, Billy, into the painting and decorating business. At night when Ian and his friends were out in the streets kicking over bins, smashing bottles, getting chased out of the area with the locals and generally causing havoc Alec was going to Christian Endeavour and the local mission to learn about the god. This showed that Alec was independent and had the will power to do the things that he wanted to do and that were best for him. He also showed that he had a great deal of character, as he didnt succumb to peer pressure from going to different organisations and doing the complete opposite from his friends. By going to all these Christian related activities it appeared that Alec was trying to fill a space in his life with religion. Meanwhile Davies life was going from bad to worse because he got a beating from the illegal bookmakers heavies and subsequently got sacked from his job as a tickman because of it. From this point on I got the impression that Davie just didnt care anymore and that his easy laid back attitude towards life, i. e. First thing themorra morning or Dont worry son. Well work it out, started to affect his relationship with Alec. He constantly put things off until the next day, and then the next day and then they still never got done. A key example of this was the story of Alecs toy yacht, which despite Davies endless promises never gets fixed. Alec had only asked for his father to make a sail for it but the answer was always Ahll fix it up when av got the time or Just wait and see. One day when his Uncle Billy was round at his house, Alec asked him if he could paint the yacht for him. Billy took it away that day and had it back and painted for him within a couple of days. This only highlights the differences in character between Davie and Billy. Billy knew that betting wasnt the way to get through life, it was always his tough optimism and hard work that got him and his family through, whilst it was Davies nonchalant and pessimistic attitude that had turned his life into ruins. To be fair to Davie he had backed a loser right fae the start with the sailmaking trade, with collapsed only months after he received his apprenticeship. Davie was an exceptionally unlucky man, everything he touched turned to waste. During the play his wife died, he had been made redundant from three different jobs, he got tangled up in debt, he was attacked and his relationship with Alec had failed severely. This rejection and overall bad luck must have crushed his confidence and he now thought that he was defeated before he had even begun. In the very last scene of the play, Davie and Alec have to resort to burning half their belongings one night in an attempt to stop themselves from freezing because Davie had gambled with the money to pay for coal and electricity. Whilst Alec was rummaging around the house looking for firewood he stumbled across his old toy yacht buried deep in the glory hole. He sat it to the side and continued burning everything else until they eventually ran out. In a way Alec didnt want to burn the yacht because still liked it but on-the-other-hand he knew he had to burn it to rid himself from his sad memories. So when the last piece of furniture had burned down, Alec wedged the yacht right in the centre of the fire. The fames begun lick around it and in the end he finally got what he had waited his whole life for, his little toy yacht had a sail, only it had a sail of flames.

Report On Child Protection Welfare As A Community Based Social Worker

Report On Child Protection Welfare As A Community Based Social Worker Running Head: TRENDS, CHALLENGES AND OPPORTUNITIES IN SOCIAL WORK 1 TRENDS, CHALLENGES AND OPPORTUNITIES IN SOCIAL WORK PAGE \* MERGEFORMAT 12Report On Child Protection Welfare As A Community Based Social WorkerIntroductionThis report explores child protection and welfare as one of the many subsectors of social work practice, and understand the manner in which the trend have defined it. The programs for child protection and welfare have varied widely dependent on the kind of community one has come from, and the most recent trends are to be examined by taking into consideration a certain section of the community (Parton, 2007). This report considered a wide range of views from scholars to examine all the different aspects of the issue. Though in each context of practise, there are different kinds of challenges, these also become the sources for opportunities. To have an all rounded discussion, I also looked at the kind of opportunities that exist that could be exploited.English: Chu rch Notice Board in porch at St George...TrendThe recent major trend in this subsector has been that a number of changes were implemented across child protection and welfare systems. These have been supported largely by the enactments of the new child protection legislations. One is informed mainly by the research programs implemented in states such as the UK and their Department of Health as well as coordinated by the Dartington Social Research Unit at the University of Bristol (Forrester Hughes, 2008). In such case, child protection and welfare has seen the shift in the manner and practice going away from the restrictive and narrowly defined investigations approach to include the assessments of the broader contexts of the child as well as family that looks into wider needs, the strengths or resources, as well as the kind of relationships had with both the...

The Evolution of GIS Essay Example | Topics and Well Written Essays - 3000 words

The Evolution of GIS - Essay Example terature on this subject, it is clear that these two are the core components of the system and the manner by which they rapidly evolve has driven the pace by which GIS has changed and will change over time. This is supported by the evidences that follows. Essentially, GIS is defined as â€Å"the system of computer hardware, software, personnel, organizations, and business processes designed to support the capture, management, manipulation, analysis, modeling and display of spatially referenced data† (TRB, p.10). As with any type of computing technology, the GIS's own system is consisted of three basic parts, namely, the UI or the user interface, the tools, which is differentiated according to functions, and, finally, the data manager. Put in another way, the components of the system can be said to include data, technology, application and humans (Lloyd and Bunch, 2003, p.828). All of which have their respective and equally important functions. While the GIS could run in a sing le computer terminal, the optimum framework requires several computers for GIS operations - desktop, client server, centralized desktop and centralized server (Longley et al. 2005, p.158). These variables and operational framework underscore why hardware and software are critical in the progression of the GIS development. Hardware The invention of the silicon chip back in the 1970s launched the fast paced computer development (Pasewark and Pinard, 2007, p. 263). It led to the viability of personal computers, which became the precursor of the current technology typified by smaller, faster, powerful and cheap hardware. To put this environment in context, there is the so-called Moore’s Law which states that computer processing chips double in power almost every 18 months, making computer more... Thi essay stresses that the evolution of the GIS system can be attributed to several important technological developments. First, there are the advances in computing hardware, which made computers affordable and powerful. Today, many people and organizations can buy desktop systems not just in workplaces but even for home use. These are computers that can perform complicated tasks and functions with apparent ease. This report makes a conclusion that in order to depict the significance of the evolution of GIS in the past twenty years, it is important to go back to the importance of geographic information. Accurate and reliable geographic data do not only mean effective geographic expeditions or land mapping initiatives. Rather, they are imperative in many other endeavors such as in running a city or in predicting a catastrophe. This is the reason why GIS is an important technological tool and how its evolution should be of interest for people. In the past twenty years, there were significant achievements and the evolutionary path points to a more sophisticated and intuitive system that would help people to make sense not just of the Earth but also beyond. It is worth noting that today there are just numerous geographies or approaches to geography. One of GIS’ greatest contributions, as evidenced by its evolution, is the universalization and consistency of geographic information.

W5 BPO GROUP PPP OM Essay Example | Topics and Well Written Essays - 500 words

W5 BPO GROUP PPP OM - Essay Example Below is how the two tools can be applied to the case points. On the case of time spent by the CSRs on the phone for calls that they handled versus calls that they sent to the BAs, this can be classified as one of the seven wastes under the lean production (Abdullah, 2004). Specifically waste for waiting. Instead of spending that much time on calls to and from the BAs, alternatives that focus on reducing the waiting on phone for response can be used. For example text messages and emails could be used, which will require less time in waiting for response to be given. Since emails and text messages are less interactive between communicating parties, it could save much time and guarantee efficiency at work. On the case point of CSRs giving priority to new incoming calls over callbacks, this can be said to be misplaced priority that undermines the process capabilities of the workplace. Once there is such undermining of process capabilities also, effectiveness becomes affected (Meredith and Shafer, 2014). Clearly, new calls come with much enquiry which require a lot of attention, explanations and feedback. Callbacks on the other hand have solutions to problems. As recommended earlier, there can be other forum for new inquiries, for example through the use of emails and text messages so that after finding appropriate responses, those who made the enquiries can be contacted by the CSRs. On the third case point about BAs giving priority to Database Update sub-process over researching calls escalated by the CSRs, it is important to note that such limited priority to calls escalated by the CSRs can bring about deviation from targets, which is against the principle of the six sigma (Labovitz and Rosansky, 2007). It is said that this situation would lead to deviation from targets because once there is escalation of calls from the CSRs, the time to be

Digital Voltmeter Using An 8051 Microcontroller Computer Science Essay

Digital Voltmeter Using An 8051 Microcontroller Computer Science Essay A voltmeter finds its importance wherever voltage is to be measured. A  voltmeter  is an instrument used for measuring the  electrical potential  difference between two points in an electric circuit. Analog voltmeters move a pointer across a scale in proportion to the voltage of the circuit. General purpose analog voltmeters may have an accuracy of a few per cent of full scale, and are used with voltages from a fraction of a volt to several thousand volts. Digital voltmeters give a numerical display of voltage by use of analog to digital converter. Digital meters can be made with high accuracy, typically better than 1%. Specially calibrated test instruments have higher accuracies, with laboratory instruments capable of measuring to accuracies of a few parts per million. Meters using  amplifiers  can measure tiny voltages of micro-volts or less. Digital voltmeters (DVMs) are usually designed around a special type of  analog-to-digital converter  called an  integrating converter. Voltmeter accuracy is affected by many factors, including temperature and supply voltage variations. To ensure that a digital voltmeters reading is within the manufacturers specified tolerances, they should be periodically calibrated. Digital voltmeters necessarily have input amplifiers, and, like vacuum tube voltmeters, generally have a constant input resistance of 10 mega-ohms regardless of set measurement range. This project aims at building a Digital Voltmeter using an 8051 microcontroller. All the data accessed and processed by the microcontroller is the digital data. And thus, the usage of an analog-to-digital converter finds its necessity here. A standard analog-to-digital converter ADC0804 is used in the current project. The input voltage (which is the analog input) is restricted to be in the range of 0-15V. The processed data in the 8051 is used to drive a display output on a LCD display unit. The display is in the form of digits and is accurate to a value of one decimal. The input voltage is desired to be that of a DC voltage for steady observations of the voltage value on the LCD panel. Rather, if an AC input voltage is given at the input terminals, the output varies indefinitely as is the nature of AC voltage. Thus, the instantaneous value of the AC voltage is not steadily shown on the LCD panel. COMPONENTS Following is the entire set of the components used to build the Digital Voltmeter: Microcontroller, AT89S52 Analog-to-Digital Converter, ADC0804 161 LCD Oscillator circuit for the microcontroller 12MHz Crystal Capacitor 33pF Capacitors Voltage divider circuit/ Input terminals 200k, 100k Resistors 100nF Capacitor ADC Clock Circuit 10k Resistor 150pF Capacitor 100k Potentiometer (to adjust the back-light of the LCD) Description of the Components used Microcontroller, AT89S52 Æ’Â   The AT89S51 is a low-power, high-performance CMOS 8-bit microcontroller with 4K bytes of In-System Programmable Flash memory. The device is manufactured using Atmels high-density non-volatile memory technology and is compatible with the industry-standard 80C51 instruction set and pin-out. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional non-volatile memory programmer. By combining a versatile 8-bit CPU with In-System Programmable Flash on a monolithic chip, the Atmel AT89S51 is a powerful microcontroller which provides a highly-flexible and cost-effective solution to many embedded control applications. The AT89S51 provides the following standard features: 4K bytes of Flash, 128 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, two 16-bit timer/counters, a five-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S51 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next external interrupt or hardware reset. Pin configuration of the AT89S52 is as follows: 40-Lead PDIP VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes during program verification. External pull-ups are required during program verification. Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and verification. P1.5 MOSI (used for In-System Programming) P1.6 MISO (used for In-System Programming) P1.7 SCK (used for In-System Programming) Port 2 Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S51, as shown in the following table. Alternate functions of port 3, P3.0 RXD (serial input port) P3.1 TXD (serial output port) P3.2 INT0 (external interrupt 0) P3.3 INT1 (external interrupt 1) P3.4 T0 (timer 0 external input) P3.5 T1 (timer 1 external input) P3.6 WR (external data memory write strobe) P3.7 RD (external data memory read strobe) RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives High for 98 oscillator periods after the Watchdog times out. The DIS-RTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped during each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier. Memory Organisation, Program Memory: If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S51, if EA is connected to VCC, program fetches to addresses 0000H through FFFH are directed to internal memory and fetches to addresses 1000H through FFFFH are directed to external memory. Data Memory: The AT89S51 implements 128 bytes of on-chip RAM. The 128 bytes are accessible via direct and indirect addressing modes. Stack operations are examples of indirect addressing, so the 128 bytes of data RAM are available as stack space. Interrupts: The AT89S51 has a total of five interrupt vectors: two external interrupts (INT0 and INT1), two timer interrupts (Timers 0 and 1), and the serial port interrupt. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. ADC0804 Æ’Â   The ADC080X family are CMOS 8-Bit, successive approximation A/D converters which use a modified potentiometric ladder and are designed to operate with the 8080A control bus via three-state outputs. These converters appear to the processor as memory locations or I/O ports, and hence no interfacing logic is required. The differential analog voltage input has good common-mode-rejection and permits offsetting the analog zero input voltage value. In addition, the voltage reference input can be adjusted to a low encoding any smaller analog voltage span to the full 8 bits of resolution. The functional diagram of the ADC080X series of A/D converters operates on the successive approximation principle. Analog switches are closed sequentially by successive-approximation logic until the analog differential input voltage [VlN(+) VlN(-)] matches a voltage derived from a tapped resistor string across the reference voltage. The most significant bit is tested first and after 8 comparisons (64 clock cycles), an 8- bit binary code (1111 1111 = full scale) is transferred to an output latch. The normal operation proceeds as follows. On the high-to-low transition of the WR input, the internal SAR latches and the shift-register stages are reset, and the INTR output will be set high. As long as the CS input and WR input remain low, the A/D will remain in a reset state. Conversion will start from 1 to 8 clock periods after at least one of these inputs makes a low to high transition. After the requisite number of clock pulses to complete the conversion, the INTR pin will make a high- to-low transition. This can be used to interrupt a processor, or otherwise signal the availability of a new conversion. A RD operation (with CS low) will clear the INTR line high again. The device may be operated in the free-running mode connecting INTR to the WR input with CS = 0. To ensure start-up under all possible conditions, an external WR pulse is required during the first power-up cycle. A conversion in process can be interrupted by issuing a second start command. Digital Operation The converter is started by having CS and WR simultaneously low. This sets the start flip-flop (F/F) and the resulting 1 level resets the 8-bit shift register, resets the Interrupt (INTR) F/F and inputs a 1 to the D flip-flop, DFF1, which is at the input end of the 8-bit shift register. Internal clock signals then transfer this 1 to the Q output of DFF1. The AND gate, G1, combines this 1 output with a clock signal to provide a reset signal to the start F/F. If the set signal is no longer present (either WR or CS is a 1), the start F/F is reset and the 8-bit shift register then can have the 1 clocked in, which starts the conversion process. If the set signal were to still be present, this reset pulse would have no effect (both outputs of the start F/F would be at a 1 level) and the 8-bit shift register would continue to be held in the reset mode. This allows for asynchronous or wide CS and WR signals. After the 1 is clocked through the 8-bit shift register (which completes the SAR ope ration) it appears as the input to DFF2. As soon as this 1 is output from the shift register, the AND gate, G2, causes the new digital word to transfer to the Three-State output latches. When DFF2 is subsequently clocked, the Q output makes a high-to-low transition which causes the INTR F/F to set. An inverting buffer then supplies the INTR output signal. When data is to be read, the combination of both CS and RD being low will cause the INTR F/F to be reset and the three state output latches will be enabled to provide the 8-bit digital outputs. Digital Control Inputs The digital control inputs (CS, RD, and WR) meet standard TTL logic voltage levels. These signals are essentially equivalent to the standard A/D Start and Output Enable control signals, and are active low to allow an easy interface to microprocessor control busses. For non-microprocessor based applications, the CS input (pin 1) can be grounded and the standard A/D Start function obtained by an active low pulse at the WR input (pin 3). The Output Enable function is achieved by an active low pulse at the RD input (pin 2). Analog Operation The analog comparisons are performed by a capacitive charge summing circuit. Three capacitors (with precise ratioed values) share a common node with the input to an autozeroed comparator. The input capacitor is switched between VlN(+) and VlN(-), while two ratioed reference capacitors are switched between taps on the reference voltage divider string. The net charge corresponds to the weighted difference between the input and the current total value set by the successive approximation register. A correction is made to offset the comparison by 1/2 LSB. Analog Differential Voltage Inputs and Common- Mode Rejection This A/D gains considerable applications flexibility from the analog differential voltage input. The VlN(-) input (pin 7) can be used to automatically subtract a fixed voltage value from the input reading (tare correction). This is also useful in 4mA 20mA current loop conversion. In addition, common-mode noise can be reduced by use of the differential input. The time interval between sampling VIN(+) and VlN(-) is 41/2 clock periods. There is maximum error voltage due to this slight time difference between the input voltage samples. The allowed range of analog input voltage usually places more severe restrictions on input common-mode voltage levels than this. An analog input voltage with a reduced span and a relatively large zero offset can be easily handled by making use of the differential input. Analog Input Current The internal switching action causes displacement currents to flow at the analog inputs. The voltage on the on-chip capacitance to ground is switched through the analog differential input voltage, resulting in proportional currents entering the VIN(+) input and leaving the VIN(-) input. These current transients occur at the leading edge of the internal clocks. They rapidly decay and do not inherently cause errors as the on-chip comparator is strobed at the end of the clock period. Input Bypass Capacitors Bypass capacitors at the inputs will average these charges and cause a DC current to flow through the output resistances of the analog signal sources. This charge pumping action is worse for continuous conversions with the VIN(+) input voltage at full scale. For a 640kHz clock frequency with the VIN(+) input at 5V, this DC current is at a maximum of approximately 5uA. Therefore, bypass capacitors should not be used at the analog inputs or the VREF/2 pin for high resistance sources (>1kOhm.) If input bypass capacitors are necessary for noise filtering and high source resistance is desirable to minimize capacitor size, the effects of the voltage drop across this input resistance, due to the average value of the input current, can be compensated by a full scale adjustment while the given source resistor and input bypass capacitor are both in place. This is possible because the average value of the input current is a precise linear function of the differential input voltage at a constant conversion rate. Input Source Resistance Large values of source resistance where an input bypass capacitor is not used will not cause errors since the input currents settle out prior to the comparison time. If a low-pass filter is required in the system, use a low-value series resistor for a passive RC section or add an op amp RC active low-pass filter. For low-source-resistance applications, a 0.1uF bypass capacitor at the inputs will minimize EMI due to the series lead inductance of a long wire. A 100Ohm series resistor can be used to isolate this capacitor (both the R and C are placed outside the feedback loop) from the output of an op amp, if used. Stray Pickup The leads to the analog inputs (pins 6 and 7) should be kept as short as possible to minimize stray signal pickup (EMI). Both EMI and undesired digital-clock coupling to these inputs can cause system errors. The source resistance for these inputs should, in general, be kept below 5kÃŽÂ ©. Larger values of source resistance can cause undesired signal pickup. Input bypass capacitors, placed from the analog inputs to ground, will eliminate this pickup but can create analog scale errors as these capacitors will average the transient input switching currents of the A/D (see Analog Input Current). This scale error depends on both a large source resistance and the use of an input bypass capacitor. This error can be compensated by a full scale adjustment of the A/D (see Full Scale Adjustment) with the source resistance and input bypass capacitor in place, and the desired conversion rate. Reference Voltage Span Adjust For maximum application flexibility, these A/Ds have been designed to accommodate a 5V, 2.5V or an adjusted voltage reference. This has been achieved in the design of the IC. Notice that the reference voltage for the IC is either 1/2 of the voltage which is applied to the V+ supply pin, or is equal to the voltage which is externally forced at the VREF/2 pin. This allows for a pseudo-ratiometric voltage reference using, for the V+ supply, a 5V reference voltage. Alternatively, a voltage less than 2.5V can be applied to the VREF/2 input. The internal gain to the VREF/2 input is 2 to allow this factor of 2 reduction in the reference voltage. Zero Error The zero of the A/D does not require adjustment. If the minimum analog input voltage value, VlN(MlN), is not ground, a zero offset can be done. The converter can be made to output 0000 0000 digital code for this minimum input voltage by biasing the A/D VIN(-) input at this VlN(MlN) value. This utilizes the differential mode operation of the A/D. The zero error of the A/D converter relates to the location of the first riser of the transfer function and can be measured by grounding the VIN(-) input and applying a small magnitude positive voltage to the VIN(+) input. Zero error is the difference between the actual DC input voltage which is necessary to just cause an output digital code transition from 0000 0000 to 0000 0001 and the ideal 1/2 LSB value (1/2 LSB = 9.8mV for VREF/2 = 2.500V). Full Scale Adjust The full scale adjustment can be made by applying a differential input voltage which is 11/2 LSB down from the desired analog full scale voltage range and then adjusting the magnitude of the VREF/2 input (pin 9) for a digital output code which is just changing from 1111 1110 to 1111 1111. When offsetting the zero and using a span-adjusted VREF/2 voltage, the full scale adjustment is made by inputting VMlN to the VIN(-) input of the A/D and applying a voltage to the VIN(+) input. Clocking Option The clock for the A/D can be derived from an external source such as the CPU clock or an external RC network can be added to provide self-clocking. The CLK IN (pin 4) makes use of a Schmitt trigger. Heavy capacitive or DC loading of the CLK R pin should be avoided as this will disturb normal converter operation. Loads less than 50pF, such as driving up to 7 A/D converter clock inputs from a single CLK R pin of 1 converter, are allowed. For larger clock line loading, a CMOS or low power TTL buffer or PNP input logic should be used to minimize the loading on the CLK R pin (do not use a standard TTL buffer). Restart During a Conversion If the A/D is restarted (CS and WR go low and return high) during a conversion, the converter is reset and a new conversion is started. The output data latch is not updated if the conversion in progress is not completed. The data from the previous conversion remain in this latch. Continuous Conversions In this application, the CS input is grounded and the WR input is tied to the INTR output. This WR and INTR node should be momentarily forced to logic low following a power-up cycle to insure circuit operation. Interfacing the Microcontroller Interfacing the ADC0804 with 8051 Æ’Â   As shown in the typica circuit, ADC0804 can be interfaced with any microcontroller. A minimum of 11 pins are required to interface the ADC0804, eight for data pins and 3 for control pins. As shown in the typical circuit the chip select pin can be made low if you are not using the microcontroller port for any other  peripheral  (multiplexing). There is a  universal  rule to find out how to use an IC. All we need is the datasheet of the IC we are working with and a look at the  timing diagram  of the IC which shows how to send the data, which signal to assert and at what time  the signal  should be made high or low, etc. Timing Diagrams, Pin Description 1.  Ã‚  CS, Chip Select: This is an active low pin and used to activate the ADC0804. 2.  Ã‚  RD, Read: This is an input pin and active low. After converting the analog data, the ADC stores the result in an internal register. This pin is used to get the data out of the ADC 0804 chip. When CS=0 high to low pulse is given to this pin, the digital output is shown on the pins D0-D7. 3.  Ã‚  WR, Write: This is an input pin and active low. This is used to instruct the ADC to start the conversion process. If CS=0 and WR makes a low to high transition, the ADC starts the conversion process. 4.  Ã‚  CLK IN, Clock IN: This is an input pin connected to an external clock source. 5.  Ã‚  INTR, Interrupt: This is an active low output pin. This pin goes low when the conversion is over. 6.   Vin+ : Analog Input . 7.   Vin- : Analog Input. Connected to ground. 8.  Ã‚  AGND: Analog Ground. 9.  Ã‚  Vref/2: This pin is used to set the reference voltage. If this is not connected the default reference voltage is 5V. In some application it is required to reduce the step size. This can be done by using this pin. 10.   DGND: Digital Ground. 11-18. Output Data Bits (D7-D0). 19. CLKR: Clock Reset. 20. Vcc: Positive Supply The above timing diagrams are from ADC0804 datasheet. The first diagram shows how to start a conversion. Also you can see which signals are to be asserted and at what time to start a conversion. So looking into the timing diagram  we note down the steps or say the order in which signals are to be asserted to start a conversion of ADC. As we have decided to make Chip select pin as low so we need not to bother about the CS signal in the  timing diagram. Below steps are for starting an ADC conversion. I am also including CS signal to give you a clear picture. While programming we will not use this signal. Make chip select (CS) signal low. Make write (WR) signal low. Make chip select (CS) high. Wait for INTR pin to go low (means conversion ends). Once the conversion in ADC is done, the data is available in the output latch of the ADC. Looking at the second diagram, which shows the  timing diagram  of  how to read  the converted value from the output latch of the ADC, data of the new conversion is only available for reading after ADC0804 made INTR pin low or say when the conversion is over. Below are the steps to read output from the ADC0804. Make chip select (CS) pin low. Make read (RD) signal low. Read the data from port where ADC is connected. Make read (RD) signal high. Make chip select (CS) high. Interfacing the LCD with 8051 Æ’Â   Pin Information of LCD: Pin No Name Description 1 Vss Ground 2 Vdd +5V 3 Vee Contrast Adjustment -2V to -5V 4 RS Register Select 5 RW 1 -Read , 0- Write 6 E Enable Strobe 7 D0 Data Line 8 D1 Data Line 9 D2 Data Line 10 D3 Data Line 11 D4 Data Line 12 D5 Data Line 13 D6 Data Line 14 D7 Data Line 15 LED+ Backlit LED +V   Vdd (Optional signal) 16 LED- Backlit LED -V   Vss (Optional signal) Algorithm to send data to LCD: 1.Make R/W low 2.Make RS=0 ;if data byte is command RS=1 ;if data byte is data (ASCII value) 3.Place data byte on data register 4.Pulse E (HIGH to LOW) 5.Repeat the steps to send another data byte LCD Initialization: Proper working of LCD depend on the how the LCD is initialized. We have to send few command bytes to initialize the LCD. Simple steps to initialize the LCD Specify function set: Send  38H  for 8-bit, double line and 57 dot character format. Display On-Off control: Send  0FH  for display and blink cursor on. Entry mode set: Send  06H  for cursor in increment position and shift is invisible. Clear display: Send  01H  to clear display and return cursor to home position. Writing software: The LCD module is an intelligent component. We communicate to LCD module by sending commands from microcontroller. To write data to LCD module separate sequence is followed for 4 bit and 8 bit mode. Writing command for 8 Bit mode: Write 8 bit data on D0-D7 Generate strobe by taking EN from high to low Writing command for 4 Bit mode: Write 4 bit data (upper nibble) on D4-D7 Generate strobe by taking EN from high to low Write 4 bit data (lower nibble) on D4-D7 Generate strobe by taking EN from high to low LCD Commands:   Instruction RS RW D7 D6 D5 D4 D3 D2 D1 D0 Description NOP 0 0 0 0 0 0 0 0 0 0 No Operation Clear Display 0 0 0 0 0 0 0 0 0 1 Clear Display and Address counter = 0 Cursor Home 0 0 0 0 0 0 0 0 1 x Address counter = 0 Entry mode set 0 0 0 0 0 0 0 1 I/D S Set cursor direction(I/D) and auto display shift (S) Display Control 0 0 0 0 0 0 1 D C B Turn display (D) and cursor (C) ON/OFF. Set cursor blinking(B) Cursor/ Display shift 0 0 0 0 0 1 S R/L x x Shift display/cursor (S), specify direction (R/L) Function set 0 0 0 0 1 DL N F x x Set Interface data width (DL), number of display lines (N), character font (F) Set CGRAM Address 0 0 0 1 Set CGRAM address (D0-D5), CGRAM data is sent after this command Set DDRAM Address 0 0 1 Set DDRAM address (D0-D6), DDRAM data is sent after this command Busy Flag and Address 0 1 BF Read busy flag (BF) and address counter(D0-D6) Write Data 1 0 Write data (D0-D7) into DDRAM/CGRAM Read Data 1 1 Read data (D0-D7) from DDRAM/CGRAM Legends used in table:- I/D:  Ã‚  Ã‚  Ã‚  Ã‚  1- Increment, 0- Decrement S:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- Auto Display shift, 0 No display shift D:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- Display ON, 0 Display OFF C:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- Cursor ON, 0- Cursor OFF B:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- Cursor blinking ON, 0 Cursor blinking OFF S:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- Display Shift, 0 -Cursor move R/L:  Ã‚  Ã‚  Ã‚  1- Shift right, 0- Shift left DL:  Ã‚  Ã‚  Ã‚  Ã‚  1- 8 bit interface, 0- 4 bit interface N:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- 2 lines, 0- 1 line F:  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  Ã‚  1- 5X10 dots font, 0- 5X7 dots f